Really?! Is this a different sort of bus architecture from the x86 world
then? (I mean apart from the obvious) The clock multipliers I've seen there
are exactly what the name suggests- how many internal clock cycles are
generated for each supplied by the crystal.. messing with those settings
defintely does not affect communications with the surrounding chips.. I'm
surprised it's different for the SA and curious about how they do it-
Regards,
Sam
Humphreys, David wrote:
> Oh dear! Don't do this! Quite apart from the exteme
> difficulty in isolating the pins, it won't work.
>
> It is true that the SA110 uses a PLL to multiply the crystal
> frequency. The multiplication factor is determined by the
> state of 4 pins on power up. If you change the level on these
> pins you will certainly change the core frequency. This is
> fine but the same crystal runs the voyager asic. It will
> still be running at its' 'normal' speed. This chip has more to
> do than just serial comms. There is a timing relationship
> between it and the SA-110 that is destroyed when you change
> the configuration pins.
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